The present invention relates to a MOS transistor with high voltage sustaining capability and low closing resistance. Particularly, the invention relates to a PMOS transitor having a high voltage sustaining capability with low closing resistance.
A high-voltage PMOS-transistor with a breakthrough voltage of about 44 V is disclosed in EP-A-91 911 911. Particularly in the automative region, however, increased demands are posed to the voltage sustaining capability. Thus, for instance, it is desirable that the PMOS transistor has a voltage sustaining capability of &gt;60, preferably about 80 V, with the additional demand that the closing resistance of this transistor is relatively low.
For the voltage sustaining capability of MOS transistors, it is required that the electric field between the drain-side gate edge and the drain is decreased and the strength of the electric field on the drain-side gate edge is reduced. In principle, this can be achieved in that the drain is arranged at a distance from the drain-side gate edge, and in that a so-called drain extension region is arranged between the drain region and the gate, with the drain extension region having a lower concentration of charge carriers. The drain extension region is located around the drain region so that the latter is arranged within the former.
Such a drain extension region makes it possible, due to the relatively low concentration of charge carriers, to sufficiently decrease the electric field between the drain and the drain-side gate edge and to reduce the strength of the electric field on the gate edge to a sufficient extent. However, in such a transistor design, the closing resistance will increase. This closing resistance can be lowered if one succeeds in gradually increasing the charge carrier concentration in the drain extension region, i. e. starting from the drain-side gate edge up to the drain region. An example of such a MOS transistor with laterally modulated drain extension region is known from WO-A 97/13277. Said document discloses the lateral modulation of the doping material concentration in the drain extension region by insertion of an n-ion implantation while masking at least one distance region, wherein the implantation areas separated after ion implantation will "flow into each other" by subsequent thermally induced diffusion. In these regions, the doping material concentration will thus be reduced.
If, one the other hand, the generation of the drain extension region has to be performed while only one ion implantation without subsequent thermally induced diffusion is available, the measures indicated in the above mentioned PCT document are not suited to realize a lateral modulation in the ion-implanted drain extension region. As an alternative, the drain extension region could be generated by introducing a plurality of ion implantations with different energies. This, however, would require additional process steps with an inherent disadvantage.
It is an object of the invention to provide an MOS transistor with high voltage sustaining capability and low closing resistance, with the drain extension region of the transistor being ion-implanted, wherein the ion implantation step for generating the drain extension region shall remain unchanged.